4.5GPIO, buses, and timers

GPIO (general-purpose I/O pins), the bus (the wiring between the CPU and peripheral devices), and the timer (time measurement and waveform generation) form the foundation of an embedded device's basic I/O. Though they may look mundane, these are the technologies that underpin embedded design: getting the input circuit design wrong causes malfunctions, getting the bus design wrong hurts performance, and failing to use the right timer function wastes CPU load on time measurement or waveform generation. This section covers the correct usage and design judgment for each.

4.5.1GPIO and pull-up/open-drain

• GPIO (general-purpose input/output) is a general-purpose pin whose input/output direction and High/Low level can be set from software. When used as an input, an unconnected (Hi-Z, or high-impedance) pin's potential is undefined, which can pick up external noise and cause a false High/Low reading. Adding a pull-up resistor (weakly pulling the pin toward the supply voltage) or a pull-down resistor (pulling it toward ground) fixes the default potential for when the switch is open (unconnected), preventing malfunction.
• Open-drain (open-collector) output is an output stage that has no transistor for the High side, so it can only pull the line toward Low (an external pull-up resistor is required to reach High). Its advantage is that connecting several devices' outputs to a single signal line still lets the line go Low if any one device drives it Low (a wired-AND), which suits a bus, such as I2C's, where multiple devices share the same line. Unlike push-pull output (which actively drives both High and Low), it avoids a short circuit from contending outputs (a bus conflict) when multiple devices assert the line at once.