4.1Logic circuits

For an embedded hardware designer, a logic circuit is not a binary "does it work or not" question—it is the task of building a circuit that satisfies both gate count (cost, power) and timing constraints (the maximum clock frequency it can run at). The same logic expression can require a different gate count depending on implementation, and the same flip-flop will malfunction if data arrival timing is off. This section builds two judgment axes grounded in the differing natures of combinational and sequential circuits: simplifying a circuit, and synchronizing it correctly.

4.1.1Combinational versus sequential circuits

• A combinational circuit is built solely from gates such as AND/OR/NOT, and its output is uniquely determined by the current inputs alone, with no memory of past state whatsoever. Adders, decoders, and multiplexers are representative examples; internally, it has no feedback path (wiring that routes its own output back to its own input).
• A sequential circuit adds a memory element (a flip-flop) and a feedback path to a combinational circuit, so that the same input can produce a different output depending on "the current internal state". Counters, registers, and the finite state machines (FSMs) that implement state transitions are representative examples of sequential circuits. Embedded protocol handling and control logic are, at their core, designed as sequential circuits.