What's changed: Initial version
5.1Cross-development environment
Covers the roles of the cross compiler, linker, and locator, which generate executable code on a host such as a PC for a target (embedded board); how to choose among ICE, JTAG, SWD, and emulators for debugging directly on the target hardware; and the judgment needed for real-hardware debugging in practice.
In embedded development, running a compiler directly on the target microcontroller board is not practical. Developers run the development environment on a host such as a PC, generate executable code for the target, place it according to the target's memory layout, and finally must directly observe whether the code behaves as written on the target hardware itself. This section builds an understanding of how the toolchain divides these roles, and the judgment needed to choose the right tool for real-hardware debugging.
5.1.1Cross compiler, linker, and locator
- A cross compiler runs on the development host (a PC, typically x86) but generates machine code for the target (an embedded board, e.g., ARM Cortex-M). It is needed because the host and target CPU architectures differ.
- A linker combines multiple compiled object files and libraries into a single executable file. A locator places the linked code and data at specific addresses on the target's actual memory map (Flash start address, RAM start address, etc.). In embedded development, the standard practice is to check the map file the locator produces to verify that code size and data placement fit within the target's memory capacity.
5.1.2Real-hardware debug tools (ICE / JTAG / SWD / emulators)
- An ICE (In-Circuit Emulator) substitutes dedicated hardware that emulates the target CPU, allowing real-time observation and control of internal registers and bus state—a highly capable real-hardware debugging device. It is expensive, but can trace internal states not visible on the real CPU.
- JTAG (Joint Test Action Group) is a standard originating from boundary scan, accessing the target CPU directly via dedicated pins to set breakpoints, read/write registers and memory, and program flash—the most widely used debug interface today. SWD (Serial Wire Debug), used on ARM-based microcontrollers, is an alternative interface with fewer pins (two) than JTAG, suited to small embedded devices where board space and connector count are at a premium.
- An emulator (in the broad sense) is an environment that simulates CPU and peripheral behavior in software without using actual target hardware. It is useful before real hardware is available, or in early-stage development where multiple design options must be compared quickly, but it has the limitation that it cannot fully reproduce actual clock precision, electrical behavior, or hardware-specific timing issues. Final performance and timing verification must still be done on real hardware (via ICE/JTAG/SWD).
Most-tested: "a cross compiler runs on the host and generates code for the target", "JTAG is the standard real-hardware debug interface", "SWD is a low-pin-count ARM alternative", and "an emulator can simulate without real hardware but cannot fully reproduce electrical behavior or timing." Also remember that ICE is expensive but highly capable.
Suppose a firmware developer working on a small sensor device built around an ARM Cortex-M finds that simulation on an emulator runs correctly, but flashing the real hardware causes sensor-value reads to fail at certain timings. From this symptom, they judge that the cause is likely hardware-specific electrical behavior or timing that the emulator cannot reproduce, and switch to direct observation on the real hardware. Because the board is extremely small and has no room for JTAG's bulkier connector, they connect the debugger via the low-pin-count SWD. Setting breakpoints via SWD and observing CPU registers and memory immediately before and after the sensor-read routine, they discover that immediately after communicating with the sensor, the CPU switches to a different interrupt handler, exceeding the communication's timing constraint (the next command must be sent within a fixed window). Had an expensive ICE been available, it could have traced internal CPU bus state in real time for even more detailed root-cause analysis, but in this case register observation via SWD alone was enough to pinpoint the cause, so procuring an ICE was judged unnecessary. As in this example, early-stage verification on an emulator and final verification on real hardware via ICE/JTAG/SWD play different roles, and whenever a symptom stems from timing or electrical behavior, the developer must return to observation on real hardware—this is the judgment expected of an embedded developer.
| Tool | Characteristic | Best suited for |
|---|---|---|
| Cross compiler / linker / locator | Builds on the host and places code per the target memory map | The foundational step of all embedded development |
| JTAG | Standard multi-pin interface; widely adopted | General real-hardware debugging, flash programming |
| SWD | ARM-oriented; two-pin, low pin count | Small boards with limited implementation area |
| ICE | Dedicated hardware; real-time internal-state visibility; expensive | Deep root-cause analysis of timing/bus contention |
| Emulator (broad sense) | No real hardware needed, but cannot reproduce electrical behavior/timing | Early verification before hardware is available, comparing designs |
Trap: "If it works on the emulator, real-hardware timing verification is unnecessary" is wrong—an emulator cannot fully reproduce electrical behavior or hardware-specific timing, so final timing/performance verification must always be done on real hardware (JTAG/SWD/ICE). Also wrong: "SWD is more capable than JTAG, so always choose SWD"—SWD's main advantage is fewer pins, and JTAG is often chosen as the broader, more mature standard on the functional side; the choice depends on board constraints and supported chips.
5.1.3Section summary
- The cross compiler runs on the host and generates code for the target; the linker/locator place it at the target's actual memory addresses
- JTAG is the standard multi-pin interface, SWD is a low-pin ARM-oriented option, and ICE is expensive but can observe even internal state
- An emulator is useful for early verification but cannot reproduce electrical behavior/timing—final verification must always be on real hardware
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Quick check
(just a quick review)Q1. On an ARM Cortex-M sensor device, simulation on an emulator works correctly, but after flashing to real hardware, sensor reads fail at certain timings. Which is the most reasonable initial step for investigating this symptom?
Q2. You want to add a debug interface to an embedded device based on an ARM microcontroller, but the board is extremely small with limited space for a connector. Which choice is most appropriate?
Q3. An embedded development team wants to quickly check CPU and peripheral behavior before real hardware is available, during an early stage of comparing multiple pre-production design candidates. Which approach is most suitable at this stage, given that final performance and timing verification will separately be done on real hardware?
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