1Processors & computer architecture

• 1.1Embedded processors and MCU/DSP

  Covers the roles of the MCU (microcontroller), the DSP, the general-purpose CPU, and the SoC; the design-philosophy difference between RISC and CISC; the use-case lineup of the ARM Cortex-M/R/A series; and the judgment skill of choosing the optimal processor configuration from an embedded device's requirements (real-time behavior, power consumption, cost, and computational characteristics).

• 1.2Instruction execution and pipelining

  Covers the instruction execution cycle from fetch through write-back; pipelining, which processes multiple instructions in staggered parallel stages; the hazards (data/structural/control hazards) that disrupt a pipeline and branch prediction; and the judgment skill of designing for performance while prioritizing an embedded device's predictability of real-time behavior and responsiveness.

• 1.3Interrupt mechanisms

  Covers the difference between external and internal interrupts; the vector table used to look up the address of the handling routine when an interrupt occurs; priority and nested interrupts, which arbitrate among multiple interrupts; interrupt latency, the delay from an interrupt occurring to the start of handling; and the design judgment of keeping an ISR (interrupt service routine) short.

• 1.4Clocks, timers, and the watchdog

  Covers clock generation and frequency division via an oscillator and a PLL (phase-locked loop); the timer/counter and PWM output used for time measurement and event generation; and the judgment skill of reliability design using a watchdog timer (WDT), which detects software runaway and triggers an automatic reset.